The present invention relates to apparatuses and methods for implementing various physically PUFs and random number generator capabilities. In particular, some embodiments are directed to various physically PUFs and random number generator implementations including systems that utilize retention time cell characteristics of dynamic random access memory (DRAM) systems.
A PUF can include a physical entity that is embodied in a physical structure and is easy to evaluate but hard to predict. Further, some embodiments of an individual PUF device should be easy to make but practically impossible to duplicate, even given the exact manufacturing process that produced it. In this respect, some examples of a desired PUF can have a hardware analog of a one-way function. PUFs can be used in the microelectronics industry in applications such as tracking chips in the supply chain, performing on-chip authentication for the execution of functions, and various other means.
Random numbers are essential in a wide range of cryptographic applications. A “random” numbers can be created from a pseudo-random number generating algorithm. All pseudo-random algorithms have a significant vulnerability issue: if one knows the algorithm and initiation seed (e.g., a starting point data input) it might be possible to reproduce the sequence.
According to an illustrative embodiment of the present disclosure, methods and apparatuses for implementing a Physically Unclonable Function (PUF) and random number generator capabilities comprising providing a device under test comprising a plurality of bits comprising integrated circuits each including a capacitor; placing the bits in a first state with charge on selected bit capacitors; stopping bit refresh for a first predetermined time; re-enabling refresh for a second predetermined time to read and refresh charge on all bits; reading all bits and recording addresses of bits that have experienced bit flip from a first state to a second state comprising from “1” to “0” state; performing selecting a plurality of said recorded addresses to generate a PUF or cryptographic key; and performing an operation comprising a test or verification operation with said generated information PUF or key. Various hardware elements are also provided as well as machine readable instructions for implementing and controlling aspects of the invention.
Additional features and advantages of the present invention will become apparent to those skilled in the art upon consideration of the following detailed description of the illustrative embodiment exemplifying the best mode of carrying out the invention as presently perceived.